1. Field of The Invention
This invention relates to high capacitance laminates made from thin films of polytetrafluoroethylene filled with large amounts of high dielectric filler, in which the films are plated or clad with copper or other conductive foils and sheets.
2. Description of The Prior Art
High dielectric laminates have been known heretofore, as has their use in printed circuit boards, especially boards for use in microwave applications. Laminates of filled polytetrafluoroethylene and clad with copper are of value in these applications because they reduce, at a given frequency, the wavelength travelling along a conductive path on the laminate. Filled polytetrafluoroethylene has advantages in this use in part because it absorbs little moisture (which affects electrical properties), exhibits low loss, and provides a chemically inert, high temperature resistant material.
Filled polytetrafluoroethylene (PTFE) laminates of high dielectric that are clad with copper are disclosed in U.S. Pat. No. 4,518,737, specifically at column 1, line 63 to column 2, line 11. However, such laminates can generally not be made thin enough for many digital printed circuit board applications where thin high dielectric laminates used to increase board capacitance would be of value.
In digital systems, speed of computation is highly valued. To achieve high speed computation, highly integrated, very fast simultaneously switching integrated circuits (IC's) have been developed. To operate properly these IC's reference known ground and power voltages that are required to remain within given ranges. When these IC's switch they require current for a very short duration. This causes a localized drop in voltage on the power plane. Historically, this drop in voltage has been moderated by the use of surface capacitors. These discrete capacitors provide a store of charge that can be fed to the power plane if the voltage begins to drop. As the speed of IC's increases, this becomes an ineffective way to solve this problem. With today's high performance IC's, the duration that current is needed is very short. Discrete capacitors cannot be positioned close enough to the IC and the path made low enough in inductance to satisfy the needs of the IC, therefore, the voltage drops. If this drop, or spike, in voltage is large enough, errors can be generated when the IC references this reduced voltage. Very thin high dielectric laminates used for the power/ground layers (when located in sequential layers) increase the capacitance of the printed wiring board. This increases the density of charge stored for a given voltage differential, reducing the voltage swings relative to a lower capacitance laminate with discrete capacitors caused by the fast switching IC's improving the fidelity of the signal.
However, thin polytetrafluoroethylene films filled with high dielectric material are not ordinarily obtainable. Filled polytetrafluoroethylene films are generally made by calendering. As the films become thinner and thinner in the calendering process, rheological problems causes pinholes or tears in the filled film. Pinholes and tears, of course, cause electrical problems.
It is desirable to provide laminates of a very thin highly filled films of polytetrafluoroethylene of high dielectric constants and conductive metals, such as copper. It is also desirable to provide a printed circuit board that utilizes such a laminate. It is further desirable to use materials of high tensile strength.